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• #9524 Malibutomi nagyúr gbors #9509

  Új Válasz 2015-08-31 11:25:59 #9524

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  Malibutomi

  nagyúr

  válasz gbors #9509 üzenetére

  Ezt talaltam most, nekem ez mar tul mely, de talan te le tudod forditani.
  Ez is csak egy forum comment, szoval csak erdekessegkepp, hogy diskuraljunk rola.

  A GTX 980 Ti can handle both compute and graphic commands in parallel. What they cannot handle is Asynchronous compute. That's to say the ability for independent units (ACEs in GCN and AWSs in Maxwell/2) to function out of order while handling error correction.

  It's quite simple if you look at the block diagrams between both architectures. The ACEs reside outside of the Shader Engines. They have access to the Global data share cache, L2 R/W cache pools on front of each quad CUs as well as the HBM/GDDR5 memory un order to fetch commands, send commands, perform error checking or synchronize for dependencies.

  The AWSs, in Maxwell/2, reside within their respective SMMs. They may have the ability to issue commands to the CUDA cores residing within their respective SMMs but communicating or issueing commands outside of their respective SMMs would demand sharing a single L2 cache pool. This caching pool neither has the space (sizing) nor the bandwidth to function in this manner.

  Therefore enabling Async Shading results in a noticeable drop in performance, so noticeable that Oxide disabled the feature and worked with NVIDIA to get the most out of Maxwell/2 through shader optimizations.

  Its architectural. Maxwell/2 will NEVER have this capability.

  [link]

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