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• #1 HiperG addikt

  2004-02-29 23:31:27 #1

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  HiperG

  addikt

  A két 64 bites technológia között - bár kompatibilisek egymással - van néhány különbség:
  
  >Could you publish list of differences between amd64 and ia32e?
  >
  >I probably could took those two 300+ page documents and try to compare
  >them by hand, but I believe you know already.
  >
  > Pavel
  
  Other than the standard IA-32 differences (eg. HT, SSE3, Intel Enhanced
  SpeedStep, etc.), there are few differences between the implementations
  of
  IA-32e and AMD64. The software visible ones are:
  
  Fast system calls:
  Syscall/sysret is supported only in 64-bit mode (not in compatibility
  mode). Sysenter/Sysexit is supported in both 64-bit and compatible
  mode.
  
  CPUID:
  If you look at Table 2-8 of Volume 1, you will find IA-32e specific
  things,
  including, GenuineIntel, HT, SSE3, monitor/mwait, Intel Enhanced
  SpeedStep,
  and cmpxchg16b.
  
  The function 8000_0001h doesn't duplicate standard-feature bits from
  function 1 in EDX. It sets only the new features that are implemented.
  
  MSRs:
  Not all MSRs are architectural, and IA-32e does not implement SYSCFG,
  TOP_MEM, TOP_MEM2, for example. MSR usage should be vendor specific
  and
  be guarded with CPUID.Model
  
  Fast-FXSAVE/FXRSTOR:
  IA-32e always saves all of the FP state on FXSAVE/FXRSTOR. Does not
  support FXSAVE/FXRSTOR with reduced FP state.
  
  Microcode Update:
  IA-32e supports microcode update as the 32-bit mode does, as you
  already
  found the discussions in the mailing list.
  
  NX (No-Execute) bit:
  Initial implementation will not support the NX bit.
  
  BSF/BSR when source is 0 & operand size is 32:
  In 64-bit mode, the processor sets ZF, and the upper 32 bits of
  the destination are undefined. Should always check the ZF or do not
  use
  32-bit operand size.
  
  Near branch with 66H prefix:
  As documented in PRM the behavior is implementation specific and
  should
  avoid using 66H prefix on near branches.
  
  Not supported in IA-32e
  =======================
  3DNow instructions (including prefecthw or prefetch with the opcode 0f
  0d)
  
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