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• #49107 Fecus11 tag MK VII #49090

  Új Válasz 2016-05-21 11:55:23 #49107

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  Fecus11

  tag

  válasz MK VII #49090 üzenetére

  DESCRIPTION
  Kingston’s KHX8500D2K2/2GN is a kit of two 128M x 64-bit
  1GB (1024MB) DDR2-1066 CL5 SDRAM (Synchronous
  DRAM) “NVIDIA SLI-Ready” memory modules, based on
  sixteen 64M x 8-bit DDR2 FBGA components per module.
  Total kit capacity is 2GB (2048MB). Each module pair has
  been tested to run at DDR2-1066MHz at a latency timing
  of 5-5-5-15 at 2.2V. The SPD is programmed to JEDEC
  standard latency 800Mhz timing of 5-5-5-18 at 1.8V. Each
  240-pin DIMM uses gold contact fingers and requires +1.8V.
  The electrical and mechanical specifications are as follows:
  SPECIFICATIONS
  Clock Cycle Time (tCK) CL=5 2.5ns (min.) / 8ns (max.)
  Row Cycle Time (tRC) 51.5ns (min.)
  Refresh to Active/Refresh 105ns
  Command Time (tRFC)
  Row Active Time (tRAS) 39ns (min.) / 70,000ns (max.)
  Single Power Supply of +1.8V (+/- .1V)
  Power 2.025 W (operating per module)
  UL Rating 94 V - 0
  Operating Temperature 0° C to 55° C
  Storage Temperature -55° C to +125° C
  FEATURES
  • Power supply : Vdd: 1.8V ± 0.1V, Vddq: 1.8V ± 0.1V
  • Double-data-rate architecture; two data transfers per
  clock cycle
  • Bidirectional data strobe(DQS)
  • Differential clock inputs(CK and CK)
  • DLL aligns DQ and DQS transition with CK transition
  • Programmable Read latency 5 (clock)
  • Burst Length: 4, 8 (Interleave/nibble sequential)
  • Programmable Burst type (sequential & interleave)
  • Timing Reference: 5-5-5-18 at +1.8V / 5-5-5-15 at +2.2V
  • Edge aligned data output, center aligned data input
  • Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
  • Serial presence detect with EEPROM
  • High Performance Heat Spreader
  • PCB : Height 1.180” (30.00mm), double sided component ezt a ramot belerakhatom a gépembe?működni fog?

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